The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 10, 1984

Filed:

Mar. 04, 1981
Applicant:
Inventor:

Hiroshi Nozawa, Yokohama, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
148187 ; 148188 ; 29571 ; 2957 / ; 2957 / ; 29578 ;
Abstract

A method for element isolation utilizing insulating materials on a semiconductor substrate in which an oxidizable material layer of polycrystalline silicon or the like is formed overlying the substrate surface, the oxidizable material layer disposed at the element-isolation-forming regions is oxidized using an oxidation mask, the oxidation mask is removed and, if necesary at least part of the unoxidized oxidizable material below the mask is removed. Predetermined processes such as oxidation and diffusion are performed thereafter to form semiconductor elements such as MOS transistors and bipolar transistors with high packaging density and reliability.


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Nozawa, Hiroshi. (1984). Method for manufacturing a semiconductor device employing element (U.S. Patent No. 4441941). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4441941

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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