The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 21, 1984

Filed:

Jul. 06, 1982
Applicant:
Inventor:

Arman V Dolikian, Palatine, IL (US);

Assignee:

Motorola, Inc., Schaumburg, IL (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
307358 ; 307359 ; 307555 ; 328151 ; 328169 ;
Abstract

The invention is a limiter circuit with dynamic hysteresis for providing improved distortion immunity at the circuit output in response to an input signal. The limiter circuit includes a positive and negative peak detector. Two weighted averages are taken of the positive and negative peaks, preferably by means of a voltage divider network. The first input to a comparator circuit receives the input signal to the limiter circuit. Different voltages from the voltage divider network are applied to the second input of the comparator circuit so as to create a dynamic hysteresis effect in the comparator circuit. The different voltages are chosen in response to the output voltage from the comparator circuit by means of an analog switch. The comparator circuit includes a fixed hysteresis voltage for stabilizing the limiter circuit at low level voltage input signals.


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