The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 07, 1984

Filed:

Dec. 04, 1981
Applicant:
Inventor:

Didier Meignant, Emerainville, FR;

Assignee:

U.S. Philips Corporation, New York, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ;
U.S. Cl.
CPC ...
29571 ; 29578 ; 156656 ;
Abstract

The invention relates to a method of manufacturing field-effect transistors having a self-aligned grid in the submicron range without using a mask of submicron size. The invention is remarkable in that it consists of undercutting the drain electrode at an edge covered with a lacquer over a distance typically smaller than one micron, depositing the source electrode, etching the semiconductor material between the drain electrode and source electrode at the undercut area, and depositing the grid electrode in the cavity thus formed. The invention also relates to field-effect transistors thus obtained.


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Meignant, Didier. (1984). Method of manufacturing field-effect transistors with self-aligned grid (U.S. Patent No. 4429452). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4429452

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