Method of making depthwise-oriented integrated circuit capacitors

Abstract

A depthwise-oriented capacitor comprises a cluster of separate, parallel, narrow elongated oppositely-doped conductive regions extending depthwise into a semiconductor substrate, for example, in an integrated circuit. The conductive regions can be parallel plates, but are preferably column shaped. The conductive regions are formed by ion implanting or diffusing a dopant into the substrate in a direction aligned with a crystallographic channel thereof to facilitate maximum ion penetration. P-type regions form one pole of the capacitor and N-type regions interspersed among the p-type regions form the opposite pole. Doping concentrations within the regions are sufficient to establish metal-like electric field boundary conditions. The bulk of the substrate containing the conductive regions is either near-intrinsic or semi-insulative so that the semiconductor material between the conductive regions is substantially nonconductive. The oppositely-doped regions are spaced closely enough together that the intervening nonconductive region is depleted of free carriers over the operational voltage range of the capacitor but sufficently separated that the depleted breakdown voltage of the nonconductive region is not exceeded. The conductive regions are arranged in a regular geometrical pattern, for example, at the vertices of a hexagonal or square honeycomb pattern, so that the nearest neighbors of each conductive region of one dopant type are of the opposite dopant type. Surface conductors interconnect at least the conductive regions of one dopant type while the oppositely-doped conductive regions are interconnected either by surface conductors or by doped conductors in the bulk of the substrate. The surface conductors are link-trimmable to vary capacitance incrementally after fabrication. Changes in capacitance values can be effected during manufacture without mask alterations by controlling the depth of penetration of the conductive regions.