The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 17, 1984
Filed:
Sep. 17, 1981
Daniel Pommier, Mordelles, FR;
Abstract
To obtain a duo-binary FSK modulation, the modulating binary signal train has a three state partial response and is fed through a precoding, a transition-type coding, a simplified MSK modulation at the carrier frequency, a frequency division by two, and a multiplication by the same signal delayed by one binary element period. In order to obtain a 'tamed FSK' modulation, the modulating binary signal train has a five state partial response and is fed through precoding, a transition-type coding, a simplified MSK modulation at the carrier frequency, a frequency division by two, a multiplication by the same signal delayed, for one part, by one binary element period and, for the other part, by two binary element periods. A TFM modulation is obtained by using the FSK duo-binary generating process, but a wave shaping filter is connected between the division by two circuit and the multiplication circuit. In a TFM modulator, the train of binary signals is applied to a partial response precoding circuit, the output of which is connected to a transition-type coding circuit, the output of which is connected to the input of a simplified MSK modulator, the output of which is connected to the input of a frequency divider by two, the output of which is connected to the input of a wave shaping filter, the output of which is directly connected to an input of a multiplier, and to the other input of the multiplier via a delay-type circuit.