The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 27, 1983

Filed:

Apr. 03, 1981
Applicant:
Inventors:

Jimmy R Naylor, Tucson, AZ (US);

William J Lillis, Tucson, AZ (US);

Anthony D Wang, Tucson, AZ (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
3403 / ; 3072 / ; 307318 ; 307456 ; 328135 ; 3403 / ;
Abstract

A digital-to-analog converter circuit includes an open-loop reference circuit for regulating a plurality of bit switch currents and utilizes a high-speed single-ended input interface network for level shifting digital input signals to the bit switches whereat the level shifted input signals switch against a substantially fixed threshold voltage. The single-ended input interface network includes a PNP input transistor coupled to an input terminal and coupled by a resistor to a regulated voltage. The PNP input transistor is coupled to a level shifting network including an emitter follower transistor and a zener junction biased by a current source. The threshold voltage is also developed by a level shifting network that includes a zener junction for compensating variations within the level shifting network of the single-ended input interface network.


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