The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 27, 1983
Filed:
Jan. 29, 1982
Makoto Masunaga, Tokyo, JP;
Takao Kinoshita, Tokyo, JP;
Toshio Sakane, Yokohama, JP;
Tokuichi Tsunekawa, Yokohama, JP;
Kazuya Hosoe, Machida, JP;
Takashi Amikura, Tokyo, JP;
Isao Harigaya, Yokohama, JP;
Canon Kabushiki Kaisha, Tokyo, JP;
Abstract
A distance detecting device in which, with respect to an object whose distance is to be detected, the images of a first and a second field following different lines of sight and containing the object and different in range are scanned while, at the same time, continuous M quantized image element data regarding the first field image and continuous N (N>M) quantized image element data regarding the second field image are obtained and the M image element data regarding the first field image are stored in a first circulation type shift register while the first M image element data of the N image element data regarding the second field image are stored in a second circulation type shift register and the remaining N-M image element data are stored in a third shift register, and the comparison between the stored data of the first and second shift registers during one circulation of said stored data and the relative shift of n bits each of the stored data of the second and third shift registers with respect to the stored data of the first shift register are repeatedly effected to thereby detect the distance to the object, characterized in that in the circulation circuit of the first shift register, bypass means is provided for delaying one circulation of the stored data of the first shift register by n bits relative to one circulation of the stored data of the second shift register and the stored data of the first shift register are circulated through the bypass means, whereby for each one circulation of the stored data of the first shift register, the stored data of the second shift register are shifted by n bits each relative to the stored data of the first shift register.