The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 06, 1983

Filed:

Aug. 05, 1980
Applicant:
Inventor:

John J Poklemba, Ijamsville, MD (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03L / ;
U.S. Cl.
CPC ...
375 97 ; 375 81 ; 375120 ; 329 50 ;
Abstract

The present invention is directed to circuitry for achieving concurrent synchronization of carrier phase and clock timing in double-sideband, suppressed carrier transmissions systems. A phase-lock loop (PLL) is used in the respective carrier and clock recovery networks. The carrier recovery loop is similar to the conventional 'Costas Loop'. The PLLs are cross coupled in an interdependent recovery structure to enable a more effective clock and carrier regeneration.


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