The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 29, 1983
Filed:
Nov. 24, 1981
Applicant:
Inventor:
Kazuhide Aoki, Kawasaki, JP;
Assignee:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ; H03K / ;
U.S. Cl.
CPC ...
377 79 ; 307269 ; 377 74 ; 377105 ; 377106 ;
Abstract
A parallel-serial converter comprises a plurality of selection-delay unit circuits. The unit circuit selectively receives an output signal from the immediately preceding unit circuit and one of a plurality of input parallel signals and shifts the selectively received signal to the immediately succeeding unit circuit. The selection-delay unit circuit is only formed of three transfer gates and two inverters in order to reduce a chip size and save power consumption.
Quick Actions:
Aoki, Kazuhide. (1983). Parallel-serial converter (U.S. Patent No. 4418418). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4418418
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile