The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 22, 1983
Filed:
Sep. 09, 1981
Jack K Keller, Macungie, PA (US);
Gilbert L Mowery, Jr, Allentown, PA (US);
Bell Telephone Laboratories, Incorporated, Murray Hill, NJ (US);
Abstract
A first MOS (metal-oxide-semiconductor) NOR-gate device feeding a second MOS NOR-gate device feeding an MOS output load device is arranged to yield a three output level buffer circuit, that is, whose output to a common data bus line can be 'high' ('1'), 'low' ('0'), or of very high impedance ('floating'). Each NOR-gate contains a low .beta. ('load') depletion mode type of MOS transistor and a high .beta. ('driver') enhancement mode type of MOS; the output load device contains an output driver enhancement mode type of MOS transistor and an output load MOS transistor having a threshold intermediate that of the depletion mode and enhancement mode type of MOS transistor. In this manner, only a single voltage source V.sub.DD, or typically about +5 volts in N-MOS integrated circuit technology is required to power the buffer circuit completely.