The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 22, 1983
Filed:
Nov. 18, 1981
Akihiko Ito, Kawasaki, JP;
Hisami Tanaka, Yokohama, JP;
Yoshihisa Takayama, Kawasaki, JP;
Seiji Kato, Yamato, JP;
Fujitsu Limited, Kawasaki, JP;
Abstract
A clock generator circuit for generating two pairs of clock signals comprises a NAND circuit and a NOR circuit cross-coupled to each other and each having an input for receiving a reference clock signal (.phi..sub.0). A first inverter is provided between the output of the NAND circuit and the other input of the NOR circuit, and a second inverter is provided between the output of the NOR circuit and the other input of the NAND circuit. A pair of clock signals (.phi..sub.2, .phi..sub.2) are generated from the NAND circuit and the first inverter, while another pair of clock signals (.phi..sub.1, .phi..sub.1) are generated from the NOR circuit and the second inverter.