The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 11, 1983

Filed:

Feb. 13, 1981
Applicant:
Inventors:

Yoshihiro Takemae, Yokohama, JP;

Fumio Baba, Yokohama, JP;

Assignee:

Fujitsu Limited, Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365206 ; 365226 ; 307572 ;
Abstract

Disclosed is a semiconductor memory device which comprises a sense amplifier formed on a semiconductor substrate, paired bit lines connected to the sense amplifier and memory cells connected to the bit lines wherein a predetermined bias voltage is applied to the semiconductor substrate and the reading operation is performed by amplifying by the sense amplifier a voltage difference caused between the paired bit lines due to access to the memory cells. This semiconductor memory device is characterized in that a voltage of a phase reverse to a noise transmitted to the bias voltage applied to the semiconductor substrate is applied to the semiconductor substrate through an electrostatic capacitance formed on the semiconductor substrate to cancel the noise. By virtue of this characteristic feature, influences of such noises can be eliminated in the semiconductor memory device of the present invention.


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