The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 04, 1983

Filed:

Oct. 05, 1981
Applicant:
Inventor:

Harry J Boll, Berkeley Heights, NJ (US);

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
3072 / ; 307297 ; 307491 ; 307494 ; 323313 ;
Abstract

An integrated circuit voltage reference (V.sub.REF) for MOS circuit utilization is supplied by the weighted difference amplification (30) of the voltages (V.sub.1, V.sub.1 ') developed by a pair of separate similar networks (10, 10' or 100, 100') each of which comprises a base-emitter junction of a bipolar semiconductor transistor (T.sub.1) whose emitter is connected to a first clocked voltage source (C.sub.1, C.sub.2, M.sub.1, M.sub.2) in a feedback loop of a difference amplifier (A.sub.1) and whose collector is connected to receive output of a second clocked voltage source (C.sub.3, C.sub.4, M.sub.3, M.sub.4) and to deliver output to a first input terminal of the difference amplifier (A.sub.1). In a preferred embodiment, a second input terminal of the difference amplifier (A.sub.1) is supplied by the output voltage of an auxiliary voltage source (C.sub.5, C.sub.6, M.sub.6, M.sub.7, M.sub.8, M.sub.9) which is in another feedback loop of this amplifier (A.sub.1).


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