The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 20, 1983

Filed:

Nov. 28, 1980
Applicant:
Inventors:

Koichi Kanzaki, Kawasaki, JP;

Minoru Taguchi, Omiya, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ; H01L / ;
U.S. Cl.
CPC ...
2957 / ; 29578 ; 29580 ; 29591 ; 148-15 ; 148174 ; 148187 ; 148188 ; 156628 ; 156657 ; 156662 ; 357 59 ; 357 92 ;
Abstract

A method for manufacturing a semiconductor integrated circuit includes diffusing an impurity of a second conductivity type into polycrystalline silicon layers formed on a first conductivity region in a substrate to form second conductivity regions, the polycrystalline silicon layers constituting first electrode wirings to the second conductivity regions; forming a thick oxidation film on the polycrystalline silicon layers and a thin oxidation film on the exposed surface of the substrate by a heat oxidation treatment; and removing the thin oxidation film to form a second electrode wiring to the first conductivity region, said second electrode wiring being insulated from the polycrystalline silicon layers by the thick oxidation film. The method provides integrated circuits such as I.sup.2 L circuits which are capable of high speed operation and a high packaging density.


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