The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 13, 1983

Filed:

Oct. 31, 1980
Applicant:
Inventors:

Yasuji Nagayama, Itami, JP;

Makoto Taniguchi, Itami, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ; G11C / ;
U.S. Cl.
CPC ...
365203 ; 365204 ;
Abstract

A MOSRAM type semiconductor memory circuit in which the storage charge per bit cell is increased without a corresponding increase in per bit chip area. A potential decision circuit is provided for each bit line in the memory for setting a potential on the corresponding bit line. A boost circuit is provided for increasing the potential on each bit line in accordance with the operation of the potential decision circuit. One boost circuit may be provided for each bit line. Alternatively, a boost circuit may be provided common to all bit lines or a plurality of bit lines in the memory circuit.


Find Patent Forward Citations

Nagayama, Yasuji. (1983). Semiconductor memory circuit (U.S. Patent No. 4404661). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4404661

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…