Shared system for shared information at main memory level in computer

Abstract

A computer arrangement for facilitating the sharing of information among computers at a memory level. Each computer includes means for accessing the main memory of another computer of the complex at machine word level, means for transmitting an interruption instruction from itself to the arithmetic control unit of the other computer, means for detecting a problem in the arithmetic control unit of itself, and means for altering one section of the logic address viewed from itself to some of a plurality of physical address spaces such as to make the same the logic address of a shared information storage region of the computer complex viewed from the program of each of the member computers. Shared information required for each computer is stored in its own main memory. When a problem occurs in the computer having the aforesaid shared information storage region it becomes evident in the computer's arithmetic control unit. As a result, an interruption instruction is sent to each of the other computers. The computers receiving the interruption permit the shared information stored in their own main memories to be transferred through the access enabling means to the main memories of the other computers to be written therein thereby restoring the shared information storage region, and permitting continual data processing.