The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 23, 1983

Filed:

Jan. 23, 1981
Applicant:
Inventor:

Takuji Sekiguchi, Machida, JP;

Assignee:

Nippon Hoso Kyokai, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
3281301 ; 307602 ; 328 75 ;
Abstract

A binary number 2.sup.n can be divided at a rate 2.sup.m by means of shifting down successive digits thereof by m digits, n and m being positive integers which have a relation n>m therebetween. According to the above principle, successive digits of a binary number, which represents the number of clock pulses corresponding to an immediately preceding pulse interval of a pulse sequence having pulse intervals varied every moment, are shifted down by m digits. Thereafter, the coincidence between those shifted down successive digits and successive digits of a binary number which represents the number of clock pulses corresponding to a required fixed rate delay time is detected through plural exclusive OR gates, so as to find an instant to which the pulse sequence should be dalayed. As a result, the fixed rate delaying of the pulse sequence can be effected at the rate 1/2.sup.m of the immediately preceding pulse interval. This fixed rate delaying of the pulse sequence is particularly fit for the clock pulse reproduction in a digital VTR or a PCM recorder operating at varied speeds. The above fixed rate delaying of the pulse sequence can be efficiently employed for a digital frequency multiplier and a digital frequency differential discriminator.


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