Fet power supply for mos memories

Abstract

The invention applies a reference voltage to a responsive means for producing a signal of one type in the absence of a semi-conductor at the addressed memory location, and applies a voltage less than the reference voltage to the responsive means for producing a signal of another type if a semi-conductor is present at the addressed memory location. The reference voltage is produced by a novel constant low voltage variable current source. The responsive means comprises inverter amplifier means. The reference voltage centers the small voltage swing on the bit line to the trigger point of the inverter amplifier. The means for determining the magnitude of voltage applied to the inverter is a pull up FET in series with the memory FET at the addressed location. If the electrical resistance of the FETs is similar, one half of the reference voltage will be applied to the inverter and it produces an off, or nearly off, type signal indicating presence; otherwise in the absence of a memory FET, full reference voltage is applied to the inverter to produce an on type signal indicating absence. Thus, the sense amplifier is independent of any reference voltage tracking the midpoint of the small bit line swing, and it is faster, requires less die area and restores full MOS output from a one volt signal swing.