The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 09, 1983

Filed:

Jun. 19, 1981
Applicant:
Inventors:

Edward Derzawiec, Mesa, AZ (US);

Wade H Nelson, Mesa, AZ (US);

Cleon Petty, Tempe, AZ (US);

Assignee:

Motorola, Inc., Schaumburg, IL (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
307454 ; 307456 ; 307458 ; 307470 ; 307480 ;
Abstract

In order to reduce the time it takes on-chip circuitry to generate an internal enabling signal from an external clock signal and an external enabling signal, the external clock signal is applied directly to the non-inverting input of an AB gate. The output of the AB gate and an external enabling signal are provided to first and second inputs of a NOR gate the output of which represents the internal enabling signal which is fed back to the inverting input of the AB gate. Thus, the clock signal propagates through only two stages of delay rather than three as is the case with prior art enabling circuitry.


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