The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 26, 1983

Filed:

Jun. 10, 1981
Applicant:
Inventors:

Peter P Connell, Marlow, GB;

Malcolm F Morgan, High Wycombe, GB;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L / ;
U.S. Cl.
CPC ...
331-2 ; 331 38 ; 328 14 ;
Abstract

A frequency synthesizer described is made up of cascaded stages each receiving a 10 MHz reference. The first stage has a multiplier producing harmonics in the range 200 to 290 MHz, and any one can be selected by a controllable bandpass filter. A divide by 100 divider feeds an output variable in 100 KHz steps in the range 2 to 2.9 MHz to the next stage. This stage has a multiplier and a bandpass filter which can be set to produce an output variable in 10 MHz steps between 180 and 270 MHz. A divide by ten divider feeds a frequency in the range 18 to 27 MHz into a phase-locked loop also receiving the output from the first stage, so as to set a VCO to produce an output which, after division by a divide by ten divider is variable in 10 KHz steps in the range 2 to 2.9 MHz. Four further stages operate similarly, so that the fourth produces an output variable in 1 MHz steps between 2 and 2.999999 MHz. The seventh or final stage produces an output variable between 20 and 30 MHz in 1 Hz steps. The multipliers and bandpass filters in each stage produce much less noise than would phase-locked loops used for multiplication purposes, and are also more rapidly settable.


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