The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 12, 1983
Filed:
May. 30, 1980
Masayuki Takahashi, Utsunomiya, JP;
Kunihiko Goto, Kawasaki, JP;
Hisami Tanaka, Yokohama, JP;
Michinobu Ohhata, Kawasaki, JP;
Fujitsu Limited, Kawasaki, JP;
Abstract
A sample and hold circuit for holding a sampled voltage, having a first MOS transistor for sampling the input voltage and a holding capacitor for holding the sampled voltage, and further comprising a second MOS transistor. The source and the drain of the second transistor are both connected to the output terminal of the circuit. The gate-source capacitance of the first MOS transistor is the sum of the gate-source and gate-drain capacitances of the second MOS transistor. When a voltage for turning on or off the first MOS transistor is applied to the gate of the first MOS transistor, the second MOS transistor is turned off or on respectively. The effect of this invention is that the sampled voltage can be held constant while turning off the first MOS transistor.