The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 05, 1983

Filed:

Dec. 23, 1980
Applicant:
Inventor:

Hiroshi Hirao, Kawasaki, JP;

Assignee:

Fujitsu Limited, Kanagawa, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ; H03L / ;
U.S. Cl.
CPC ...
307290 ; 307297 ; 307304 ; 307603 ;
Abstract

In a Schmidt trigger circuit for delaying a signal, means are provided to reduce an undesirable time lag in the discharge of charges stored in a node. The node of interest is connected to the gate of a feed-back transistor to supply a bias voltage to its gate. The node may be charged up to a high level by an abnormal rise of the power source level, and be held at that high level regardless of a subsequent lowering of the power source level to cause a time lag in the lowering of said high level at the time of discharging said charges stored at the node. Such delay is undesirably large. To reduce said time lag a transistor is connected between the node and the power source line such that when the level difference therebetween exceeds the threshold voltage of the transistor, the transistor is turned ON to discharge therethrough charges of the node to the power source line.


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Hirao, Hiroshi. (1983). Schmidt trigger circuit (U.S. Patent No. 4392066). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4392066

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