The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 14, 1983

Filed:

Sep. 30, 1980
Applicant:
Inventors:

Frederick J Aichelmann, Jr, Hopewell Junction, NY (US);

Fernando Neves, Hopewell Junction, NY (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ; G11C / ;
U.S. Cl.
CPC ...
365 77 ; 365221 ; 365238 ;
Abstract

A recirculating loop memory array is disclosed adapted for the parallel as well as serial fetching and storing of data while requiring only a single input and single output data terminal. Each loop of the array is provided with a shift register stage for parallel data accessing. A particular recirculating bit in all of the loops can be fetched in parallel into their respective shift register stages and, conversely, the bits stored in the shift register stages can be loaded in parallel into predetermined recirculating bits of their respective loops. The shift register is operated at high speed so that it may be completely loaded or unloaded during the interval between successive steppings of the loops.


Find Patent Forward Citations

Aichelmann, Jr, Frederick. (1983). Recirculating loop memory array having a shift register buffer for (U.S. Patent No. 4388701). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4388701

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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