The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 24, 1983
Filed:
Aug. 21, 1981
Douglas P Sheppard, Grapevine, TX (US);
Mostek Corporation, Carrollton, TX (US);
Abstract
A semiconductor memory address buffer (10) includes a plurality of serially connected inverter amplifier stages (76, 78, 80, and 82). An output stage (84) is connected to the last two inverter amplifier stages (80, 82). In the active mode of operation circuit (10) functions as a driver which receives an input address signal (A) and produces complementary output address signals (A, A). In a power down mode a group of transistors (18, 20 and 22) are turned off to deactive corresponding stages (76, 78 and 82) to terminate power consumption by these stages. A transistor (36) is activated to drive the input node (38) of a selected stage (80) to turn off a transistor (48) and essentially terminate power consumption by the selected stage (80). The output stage (84) receives differential inputs and functions in a push-pull configuration to produce the complementary output address signals (A, A). In the power down mode the buffer (10) has essentially zero power consumption while producing predetermined state complementary output signals (A, A).