The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 26, 1983

Filed:

Apr. 03, 1981
Applicant:
Inventors:

William J Lillis, Tucson, AZ (US);

Jimmy R Naylor, Tucson, AZ (US);

Anthony D Wang, Tucson, AZ (US);

Robert L White, Tucson, AZ (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
3403 / ; 323315 ; 3403 / ;
Abstract

An open-loop voltage reference circuit, adapted to regulate a plurality of bit switch currents within a digital-to-analog converter, includes a zener diode reference leg for developing a reference voltage. The reference leg also includes a base-emitter junction voltage multiplier for creating a compensating voltage having a temperature tracking coefficient that is equal and opposite to that of the zener diode junction voltage. The reference voltage developed by the reference leg is used to bias a temperature independent current within a slave leg, and a current mirror circuit mirrors the current within the slave leg for supplying a constant current to the reference leg. The magnitude of the reference voltage is reduced through a divider leg, and an emitter follower leg provides a low impedance bias voltage for driving the plurality of bit switch current sources. The open-loop voltage reference circuit is further adapted to compensate for second order errors caused by temperature induced variations in current gain and Early effect variations related to changes in the power supply voltage. A Gain Adjust feature is also provided for adjusting the bit switch currents without adversely affecting the regulation thereof.


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