Method of producing polysilicon structure in the 1 .mu.m range on

Abstract

Polysilicon structures down to a 1 .mu.m range on substrates containing integrated semiconductor circuits are produced by plasma etching in a plate reactor with the use of SF.sub.6 and an inert gas as the reactive gas. During this process, a semiconductor crystal wafers (4, 17) covered with a SiO.sub.2 layer (16) and a polysilicon layer (15) is provided with an etch mask (14) and positioned on a grounded electrode of the plate reactor and an etching process, which achieves a high selectivity of polysilicon (15) to SiO.sub.2 (16) and to the etch mask (14), is carried out with a HF power, P, of <0.1 watt/cm.sup.2, a gas pressure, p, ranging from 60 to 120 Pa, and an electrode temperature ranging from 20.degree. to 60.degree. C. With the inventive process, large scale integrated semiconductor circuits are produced in a single stage sequence with high etching selectivity, uniform etching and a high throughput of silicon wafers.