The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 05, 1983

Filed:

Nov. 21, 1980
Applicant:
Inventors:

Takao Nishitani, Tokyo, JP;

Yuichi Kawakami, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
364745 ;
Abstract

Overflow monitoring circuitry for an arithmetic unit offsets consecutive positive and negative overflows against one another to eliminate unnecessary overflow compensation during an arithmetic operation. In a first embodiment, an up/down counter is used to count positive overflows in one direction and negative overflows in another, with the value of the counter at the end of the arithmetic operation indicating the net overflow, if any has occurred, and the most significant bit of the counter representing the direction of any net overflow. In a second embodiment, logic circuitry offsets alternate positive and negative overflows against one another but will provide an overflow signal if either an odd number of overflows occurs or if two consecutive overflows in one direction occur during the arithmetic operation.


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