The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 05, 1983

Filed:

May. 14, 1980
Applicant:
Inventor:

Joseph Pumo, Austin, TX (US);

Assignee:

Motorola, Inc., Schaumburg, IL (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H03K / ;
U.S. Cl.
CPC ...
307481 ; 307269 ; 307473 ; 307583 ;
Abstract

A three-state MOS circuit for buffering an input signal includes an edge definition circuit which is controlled by first and second independent clock signals. The edge definition circuit includes a first transistor for producing a low-to-high voltage transition when the input signal goes from a high to a low, and a second transistor for producing a high-to-low voltage transition in response to the input signal going from a low to a high. The generation of these high-to-low and low-to-high transitions are controlled by first and second independent clock signals. The output of the edge definition circuit is applied to a driver circuit which generates output control signals. The output control signals are applied to first and second output field effect transistors so as to generate a signal representative of the input signal. The circuit is also provided with means for receiving a three-state control signal, which means is controlled by a third clock signal for disabling the driver portion of the buffer circuit so as to render the circuit output floating.


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