Sampling nrz data phase detector

Abstract

A digital sampling phase detector is provided for NRZ data phase detection and is particularly suited for applications with long sequences of no data activity. In a phase locked loop application, phase error circuitry detects the phase difference between data transitions and clock transitions of the recovered clock, and outputs phase error signals corresponding to various durations between designated transitions. Sampling switching circuitry responds to a data transition to initiate a measuring interval by forcing the output of the phase error circuitry to a low impedance follower mode to permit sampling, and responds to a designated clock transition to terminate the measuring interval by forcing the output to a high impedance state. The sampling switching circuitry prevents the sampled signal level from drifting during a non-measuring interval, and the reduction of drift significantly reduces jitter in the recovered clock. The sampling function is provided in combination in a high speed ECL phase detector.