The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 01, 1983
Filed:
Sep. 07, 1979
Cornelis Mulder, Eindhoven, NL;
Leendert Nederlof, Eindhoven, NL;
Cornelis Niessen, Eindhoven, NL;
Rene M Wijnhoven, Eindhoven, NL;
Roelof H Salters, Sunnyvale, CA (US);
U.S. Philips Corporation, New York, NY (US);
Abstract
An integrated circuit in dynamic MOS logic is composed of combinatory and sequential logic elements. Each of the latter comprises a succession of an input gate, an intermediate gate and an output gate which are activated to conduct by a corresponding phase of the first one and subsequent phases of a clock pulse cycle. The combinatory logic elements are all composed of gates of a single type, while the input signals are applied via the sequential logic elements and the output signals are output again via the latter elements. Thus, in the combinatory network only a sole type of interference is still relevant.