Substrate for interconnecting electronic integrated circuit components

Abstract

An interconnecting substrate according to the invention comprises an insulating base on which rests a set of alternating, superimposed conductive and insulating layers. Contacts are formed on the uppermost insulating layer which border at least one site or zone intended for an integrated circuit chip device whose output conductors are to be connected to the said contacts. Through-connections enable the contacts to be coupled to one of the inner conductive layers. The through-connections include at least one through-connection on the inside of the site relative to at least a predetermined one of the said contacts. A shunt conductor means connected to the predetermined contact has a part outside the site which is connected to an additional contact which serves as a substitute or replaces the said predetermined contact for the connection to the associated output conductor of the chip device. The repair arrangement according to the invention allows one to substitute for a connection inside a site over which a chip is situated between a contact and a through-connection, a link which has a part outside the site from which it is possible to make a repair or modification of the circuit function without the need to remove the component. The repair arrangement is made up of conductive and insulating layers which are deposited at least locally on the substrate.