The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 28, 1982

Filed:

Feb. 20, 1980
Applicant:
Inventor:

Hisashi Suganuma, Saitama, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03G / ; H03F / ;
U.S. Cl.
CPC ...
330285 ; 330277 ; 330300 ;
Abstract

An automatic gain control circuit where the direct current potential levels of the gate and the source of a field effect transistor in a preamplifier stage are maintained substantially equal during automatic gain control. In the first embodiment, the gate of the field effect transistor is responsive to a high frequency input signal and the drain provides the amplified high frequency input signals as an output signal. The source is connected to electrical ground by an inductor and is connected to a voltage source having a voltage level controlled in accordance with the automatic gain control signal. The inductor acts to shunt to ground the direct current component of the supply voltage provided to the source. In the second embodiment, the gate of the field effect transistor is responsive to a high frequency input signal and the source is connected to electrical ground. The drain is connected to a voltage source having a voltage level controlled in accordance with the automatic gain control signal and provides the amplified high frequency input signal as an output signal. The d.c. levels of the gate and source are maintained substantially equal and the AGC signal maintains a substantially zero d.c. bias on the field effect transistor to thereby minimize distortion.


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