Imaging system having multiple image copying and hierarchical busing

Abstract

A very high speed video imaging system wherein the video image from each video frame of M.sub.1 columns and M.sub.2 rows of video pixels is multiplexed serially by row, each image pixel corresponding to an address in said video frame; image enhancement processing is performed in real time, using r programmable processors operating on successive kernels comprising L.sub.1 rows and L.sub.2 columns of the image pixels. Real time image processing is made possible by multiple image copying means which furnishes multiple copies of the image pixels to the r processors, wherein each one of the processors receives a copy of only those image pixels having an address lying within an assigned range, which limits the amount of data handled by each processor for each video frame. The use of multiple image copies permits each processor to process pixels at an average rate which is reduced from the video data rate by a factor proportional to 1/r, thus permitting programmable processing to occur in real time despite the relatively slow speed of the processors and the high video data rate. The invention thus eliminates time sharing or arbitration among the plurality of processors.