Artwork master for production of multilayer circuit board

Abstract

A multilayer printed circuit board structure and a method for generating artwork masters for the manufacture thereof. The multilayer board comprises universal internal layers of predefined circuit patterns. The internal layers include power and ground planes, and for boards having high component and circuit density, one or two signal crossover layers with short, equal-length runs oriented transversely to the runs of an adjacent outermost signal layer. Electrical interconnections between layers of the circuit board are effected by interlayer conductors such as pins or plated-through holes at predefined locations. The artwork masters for the outermost layers are generated utilizing two degrees of layout precision. A universal layout master having interconnection pads and parallel circuit runs extending across the entire surface of the board is first prepared using a high degree of precision. The universal layout master is then superposed with other layout masters including a component matrix and utilized to generate a composite artwork master having relatively short circuit runs of a second degree of precision interconnecting the parallel runs and the pads. A tool for a unique outermost layer is then reproduced from the composite artwork master utilizing an artwork master of another layer to control interlayer registration.