Semiconductor device having an improved multilayer wiring system

Abstract

A semiconductor device includes a first metallization pattern which is sunken into a portion of a first insulating layer on the semiconductor body. This first metallization pattern is sunken through only a part of the thickness of the first layer and its surface substantially coincides with that of the first layer. The first metallization pattern and first insulating layer are covered with a second insulating layer, and a second metallization pattern is provided on the second insulating layer. In order to provide contact with desired regions of the semiconductor device, the second metallization pattern extends through contact holes in the underlying second layer to provide the desired electrical connections. This configuration results in a flatter, more efficient and at the same time a more reliable multiple-layer metallization system.