The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 02, 1982

Filed:

Nov. 10, 1980
Applicant:
Inventors:

James Ressmeyer, Loveland, CO (US);

Joe E Marriott, Loveland, CO (US);

Lawrence T Jones, Loveland, CO (US);

Assignee:

Hewlett-Packard Company, Palo Alto, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
3403 / ; 3403 / ;
Abstract

A multislope A/D converter is presented which employs a multislope integration technique enabling the use of a single comparator to detect polarity changes in the integrator output voltage. The A/D converter integrates a test signal during a run-up interval and integrates a discharging signal during the run-up interval as well as during a pre-run-down interval and a run-down interval subsequent to the run-up interval. The magnitude and polarity of the discharging signal are regulated in accordance with a switching scheme that converts circuit element mismatch error into offset measurement errors which can be eliminated by subtraction. The discharging current during the pre-run-down interval ensures that the slope of the integrator output voltage at the final polarity change is independent of test signal polarity thereby avoiding a comparator hysteresis error. A decade-run-down technique is employed during the run-down interval enabling the digital conversion to be implemented on a decade counter.


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