The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 12, 1982
Filed:
Aug. 11, 1980
Man S Lee, Belmont, CA (US);
GTE Automatic Electric Laboratories, Inc., Northlake, IL (US);
Abstract
An integrated circuit comprising first and second nodes that are connected to external circuitry, a voltage follower having input and output terminals electrically connected between the second node and the bottom plate of a first integrated capacitor C1, and second and third integrated capacitors C2 and C3 having the bottom plates thereof connected to a ground reference potential. A switch means is operative for periodically electrically connecting the top plate of C1 to the first and second nodes during first and second non-overlapping time periods in each time interval T for discharging C1 and charging C1 to the difference voltage across the nodes, respectively, where T is the time interval between adjacent second time periods and f=1/T is the switching frequency for C1. The switch means also operates for periodically electrically connecting the top plates of C2 and C3 to the second and first nodes. The circuit simulates a source resistor when the first node is electrically connected to the output terminal of a voltage source that is connected to ground. This circuit configuration simulates a bilinear source resistor when the capacitances of C1, C2 and C3 are the same values, and the circuit is characterized by the bilinear transformation.