The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 05, 1982
Filed:
Jun. 17, 1981
Applicant:
Inventor:
Tanaka Takayuki, Tokyo, JP;
Assignee:
Oki Electric Industry Co., Ltd., Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02H / ;
U.S. Cl.
CPC ...
361 91 ; 307475 ; 361101 ;
Abstract
In an interface circuit having a plurality of MOS FETs and connected between an input terminal and an external circuit for converting a MOS logic level signal into a TTL level signal, there are provided a delay circuit, a capacitor impressed with a signal delayed by the delay circuit, a potential holding circuit, and a protective circuit for preventing damage to the MOS FETs in the potential holding circuit.
Takayuki, Tanaka. (1982). Output interface circuits (U.S. Patent No. 4353104). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4353104
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile