The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 21, 1982

Filed:

Jul. 31, 1980
Applicant:
Inventors:

Yoshihiko Mizushima, Fuchu, JP;

Akitsu Takeda, Tokyo, JP;

Akira Yoshikawa, Higashiyamato, JP;

Osamu Ochi, Sayama, JP;

Tomoko Hisaki, Hamuramachi, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
148188 ; 148186 ; 148187 ; 148190 ;
Abstract

A method for fabricating semiconductor devices comprising the steps of: forming on the main surface of a semiconductor substrate an inorganic photoresist layer having a first amorphous layer, which contains Se as a matrix component and includes an impurity for providing one conductivity type and a second silver, or a silver containing layer, formed on the first layer; exposing the inorganic photoresist layer with an exposure pattern; developing the exposed inorganic photoresist layer to form a patterned impurity containing inorganic photoresist layer as an impurity source layer; forming a heat resistive overcoating layer on the main surface of the semiconductor substrate, while covering the impurity source layer; and forming a doped region by diffusing impurity from the impurity source layer into a region of the substrate underlying the impurity source layer. The heat resistive overcoating layer may be an insulation layer having a window through which a conductive layer is connected to the doped region and is extended over the overcoating layer. The doped region is formed readily and accurately with relatively few process steps and with a pattern corresponding to an exposure pattern for the inorganic photoresist layer. The diffusion of the impurity from the impurity source layer into the substrate is accurately controlled so as to provide the doped region with a desired impurity concentration. Moreover, the evaporation of the impurity into the atmosphere during processing is minimized.


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