The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 29, 1982
Filed:
Dec. 17, 1979
Tatsuro Yoshimura, Kawasaki, JP;
Fujitsu Limited, Kawasaki, JP;
Abstract
A clock signal distributing circuit is provided in its transmission line with delay time varying means and arranged so that a signal at the output terminal of the transmission line is opposite in phase to a signal at its input terminal. In the adjustment of the delay time, the input and output terminals are short-circuited by a line having a predetermined delay time to form a loop, causing oscillation. The sum of the rise and fall delay times of this loop-like transmission line is the oscillation cycle. Since the rise delay time and the fall delay time are substantially equal to each other over the entire loop, the delay time of the loop-like transmission line is obtained as 1/2 of the reciprocal of the oscillation frequency (the oscillation cycle), and from the delay time thus obtained is subtracted the delay time of the short-circuiting line to obtain the delay time between the input and output terminals of the clock signal distributing circuit. The abovesaid frequency is measured by means of a frequency counter. The delay time is adjusted, for example, by changing the length of a discrete wire.