The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 22, 1982
Filed:
Apr. 03, 1980
Geoffrey Baker, Southampton, GB;
U.S. Philips Corporation, New York, NY (US);
Abstract
In a pyroelectric detector circuit arrangement in which a pair of capacitive detector elements (C.sub.1 and C.sub.2) formed of polarized pyroelectric material are electrically connected in series with the directions of polarization of the elements being such that the normally produced signal voltages are in opposition, means are provided for inhibiting the depoling of the elements under conditions of cooling or excessive temperature cycling. These depoling inhibiting means comprise a pair of ultra-low leakage diode elements (D.sub.1 and D.sub.2) in series opposition connection and arranged in parallel connection with the capacitive detector elements. Connections are present between the common points in the diode series and the capacitive detector element series. The diode elements are arranged with respect to the directions of polarization of the detector elements so that under conditions of large decreases in temperature of the detector elements the voltages generated across the detector elements are effective to forward bias the diode elements into conduction and thereby inhibit depoling of the detector elements. The diode elements, under normal conditions of irradiation of the detector elements, present a high impedance path between the input of FET amplifier means and a point of constant potential. In one embodiment the capacitive detectors (C.sub.1 and C.sub.2), the ultra-low leakage diode elements (D.sub.1 and D.sub.2), and FET amplifier means are present in a common envelope in the form of a hybrid microcircuit having only three external terminal connections.