The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 27, 1982
Filed:
Oct. 11, 1979
Hatsuo Tajima, Matsudo, JP;
Naoki Iwami, Tokyo, JP;
Shunichi Masuda, Tokyo, JP;
Katsuichi Shimizu, Hoya, JP;
Yoshihiro Kawatsura, Kawasaki, JP;
Koji Suzuki, Yokohama, JP;
Yoshikazu Yokomizo, Kawagoe, JP;
Canon Kabushiki Kaisha, Tokyo, JP;
Abstract
The image forming method is executed by projecting a light image on a rotatable recording member to consecutively form electrostatic latent images corresponding to the light image, developing the latent images, projecting a predetermined amount of light onto a non-imaged area present between two consecutive latent images on the recording member to form an electrostatic image, detecting potential of the electrostatic image, and controlling the development of the latent images next to the electrostatic image detected during the detection of the potential in response to the detection results. This method is performed in the image forming apparatus which includes a rotatable recording member, processing units for projecting a light image onto the recording member to consecutively form electrostatic latent images corresponding to the light image, a developer unit for developing the latent images, a voltage applying circuit for applying a voltage to the developer unit, a projecting unit for projecting a predetermined amount of light onto a non-imaged area present between two consecutive latent images on the recording member, a detector for detecting surface potential of the non-imaged area, and a controller for controlling the voltage applying circuit in response to detection output from the detector in the development of the latent image next to the non-imaged area in the developer unit.