Interrupt system and method

Abstract

Method and system for responding to an interrupt signal sent to a microprocessor from one of a plurality of peripheral devices. An acknowledge signal is transmitted from the microprocessor to the peripheral devices. The acknowledge signal operatively isolates select/request terminals of the respective peripheral devices from outputs of a select code decoder. The acknowledge signal also enables the select/request terminals to be inputted to a priority encoder. The acknowledge signal further enables a signal to be produced on the select/request terminal of the interrupting peripheral device, thereby causing the priority encoder to produce a select code representative of the interrupting peripheral device. The select code is subsequently inputted to the microprocessor to enable the microprocessor to access an interrupt service subroutine for the interrupting peripheral device. Subsequent to the end of the acknowledge signal, the select code is inputted by the microprocessor to a select code decoder and is decoded thereby to produce an enable signal which is transmitted to the select/request terminal of the interrupting peripheral device. The enable signal enables the interrupting peripheral device to communicate with the microprocessor via the data bus, thereby permitting the interrupting peripheral device to be serviced by the accessed interrupt service subroutine.