The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 20, 1982
Filed:
Jul. 03, 1980
Michael Becker, Uttenreuth, DE;
Klaus Renz, Furth, DE;
Manfred Weibelzahl, Weiher, DE;
Alfons Fendt, Erlangen, DE;
Dusan Povh, Nuremberg, DE;
Gerhard Schuch, Erlangen, DE;
Hermann Waldmann, Weiher, DE;
Siemens Aktiengesellschaft, Munich, DE;
Abstract
A circuit for monitoring the voltage stress of a capacitor which produces an over-stress indicator signal responsive to the over-voltage history of the capacitor. If the measured voltage stress of the capacitor exceeds a predetermined over-voltage value, a characteristic-curve generator, having a predetermined transfer function, produces an output signal which is responsive to the measured voltage stress of the capacitor and the transfer function of the characteristic-curve generator. This signal is combined with a further signal which is responsive to a predetermined permissible continuous operation voltage value. The combined signals are conducted to an integrator having a predetermined integration time constant for producing an overload signal. The overload signal at the output of the integrator is a measure of the state of stress of the capacitor. Circuitry may be provided for disconnecting the capacitor from a transmission line in response to the output signal of the integrator. Also, plural capacitor voltage stress monitoring stages may be combined to monitor the capacitor voltage stress in a plurality of over-voltage ranges.