Method for manufacturing semiconductor memory devices

Abstract

A method for producing semiconductor memory devices each including an MNOS-type transistor and an MNOS-type capacitor or an MOS-type transistor and an MNOS-type capacitor. A thick oxide layer is formed in predetermined patterns on the surface of the substrate so as to separate the memory cell areas. The surface of the wafer is then oxidized to form a thin oxide layer on which a layer of silicon nitride is deposited and over which a layer of polycrystalline silicon is formed. Portions of the layer of silicon nitride and layer of polycrystalline silicon are etched away in preferred patterns as are second portions of the layer of polycrystalline silicon to partially expose the layer of silicon nitride. Portions of the thin oxide layer are removed in areas where the second portions of the layer of polycrystalline silicon are etched away to thereby expose a first portion of the surface of the wafer. Following the diffusion of impurities into the wafer, a layer of thermal oxide is formed. Next, portions of the silicon nitride layer and the thin oxide layer are etched away to expose a second portion of the surface of the wafer. The wafer is again thermally oxidized to form a thin oxide film on the second portion of the surface through which contact holes are subsequently formed. A conductive interconnection pattern is then formed extending into the contact holes.