Flexible hidden refresh memory circuit

Abstract

In a dynamic random access memory including means for inputting a row strobe signal and means for inputting a column strobe signal, and having the functions of incorporating a row address input in response to the row strobe signal and incorporating a column address input in response to the column strobe signal, an improvement comprising a first insulated gate field effect transistor having its drain coupled to a first junction point, its gate receiving the column strobe signal and its source supplied with a first power supply, means for charging the first junction point within a period of active level of the row strobe signal, a second insulated gate field effect transistor having its drain coupled to the first junction point, its gate coupled to a second junction point and its source supplied with the first power supply terminal, means for precharging the second junction point within a period of absence of the row strobe signal, and a third insulated gate field effect transistor having its drain coupled to the second junction point, its gate supplied with the column strobe signal and its source supplied with the first power supply. After completion of a desired operation with respect to a selected memory cell, the row strobe signal is placed at its inactive level to be reset while the column strobe signal is at its active level. Then, after a necessary reset period when the row strobe signal is made active, a change from inactive level to active level of the first junction point is suppressed to thereby inhibit active operation based on the column strobe signal.