The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 09, 1982

Filed:

Oct. 09, 1980
Applicant:
Inventors:

Marvin F Keeney, Jr, Springfield, PA (US);

William A Massey, Mt. Holly, NJ (US);

Assignee:

General Electric Company, Philadelphia, PA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02M / ;
U.S. Cl.
CPC ...
363 22 ; 363 56 ; 363133 ;
Abstract

A D.C. to D.C. converter is disclosed which includes a first and a fourth, and a second and a third, sequentially operating transistors. The D.C. to D.C. converter further includes a saturable transformer having a center-tap and resistive networks interposed among the four transistors. The D.C. to D.C. converter is adapted for energization by an input D.C. voltage. The transistors of the D.C. to D.C. converter cause one side of the input D.C. voltage to be sequentially applied to opposite sides of a primary winding of the transformer which, in turn, cause the transformer to be sequentially excited into positive and then negative saturation conditions. The sequential excitation of transformer develops a time varying square-wave type signal at the secondary windings of the transformer which is further converted into a D.C. signal by an A.C. to D.C. converter. The third and the fourth transistors are provided to inhibit simultaneous conduction between the first and the second transistors as a saturable transformer is excited into its positive and its negative saturation conditions.


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