The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 02, 1982

Filed:

Jan. 03, 1980
Applicant:
Inventors:

Takao Tsuchiya, Tokyo, JP;

Mitsuo Soneda, Tokyo, JP;

Assignee:

Sony Corporation, Tokyo, JP;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ; H03K / ; H03K / ; H03H / ;
U.S. Cl.
CPC ...
3072 / ; 307255 ; 307262 ; 307313 ; 357 24 ; 333165 ;
Abstract

A filter circuit of the type utilizing a charge-transfer device, such as a bucket brigade device, comprises a clocking signal drive circuit for supplying a clocking signal; a clock signal generator at whose output a clocking control signal is provided; a transistor whose base is connected to the output of the clock signal generator; a plurality of successive capacitive storage stages for sequentially holding a charge level representing a time-sampled input signal, each of the capacitive storage stages having a clocking electrode for receiving the clocking signal so that the charge level is transferred from one to another of the capacitive storage stages in succession, and at least one of the capacitive storage stages being formed of first and second parallel-connected capacitive circuit portions, and the first and second capacitive circuit portions having respective clocking electrodes coupled to the clock signal generator and to the emitter of the transistor, respectively; and a current feedback circuit, such as a current mirror circuit, for detecting the current flowing through the collector of the transistor and applying a corresponding current to a capacitive storage stage in advance of that stage which is coupled to the emitter of the transistor.


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