Distributed input/output controller system

Abstract

An improved distributed input/output system is disclosed for controlling numerous high speed peripheral devices (both low speed, medium speed, and high speed) and the transfer of data signals, status signals, and control signals between those devices and a general purpose digital computer. The control system described includes a direct-memory-access multiplexer which can accommodate a plurality of low or medium-speed input/output services and also high-speed input/output devices under the control of separate programmable microcoded peripheral-unit controllers. The direct-memory-access multiplexer of this invention is fully compatible with controllers that can also be used with an indirect-memory access multiplexer. Each controller, being an element of a distributed system, is adapted to be located at an individual peripheral device and each is connected to the multiplexer by an identical ribbon cable. The direct-memory-access multiplexer employs a microengine, that is, a microcoded processor, and an arithmetic logic circuit to simulate operations of a computer's central processor unit. The peripheral-unit controllers may be configured somewhat differently depending upon whether the peripheral device utilizes data signals in a parallel format or in a series format. Data is transferred directly between a computer memory unit and the periperhal devices without requiring the use of any computer working registers, without requiring subroutines to store data and status signals of an ongoing main program that is temporarily halted and without involving operations of the central processor unit. Each peripheral-device controller can issue interrupt signals which are processed on a priority basis when they occur simultaneously.