The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 22, 1981

Filed:

Aug. 22, 1980
Applicant:
Inventor:

Hans B Pogge, Hopewell Junction, NY (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G03C / ;
U.S. Cl.
CPC ...
430314 ; 430317 ; 156647 ; 156649 ; 156657 ; 156662 ;
Abstract

A method of forming surface planarity to a substrate during removal of excess dielectric material when fabricating recessed regions of dielectric material in a semiconductor device wherein a dielectric layer is formed on the surface of the silicon substrate, a relatively thick layer of polycrystalline silicon deposited over the SiO.sub.2 layer, openings formed through the polycrystalline layer and SiO.sub.2 layer and into the substrate to form trenches, vapor depositing a layer of dielectric material over the surface of the substrate to a depth sufficient to fill the trench, depositing a planarized layer over a layer of dielectric material, reactive ion etching the planarizing layer, the dielectric layer, the polycrystalline layer, and selectively removing the remaining polycrystalline silicon layer to expose the SiO.sub.2 layer.


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Pogge, Hans. (1981). Process of forming recessed dielectric regions in a monocrystalline (U.S. Patent No. 4307180). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/4307180

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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